1/4 rev. a structure silicon monolithi c integrated circuit product series low esr capacitor, 1a low dropout voltage regulator type ?? features output current : 1a high output voltage precision : 1 high input voltage : 35v absolute maximum ratings ta=25 parameter symbol limits unit supply voltage 1 vcc -0.3 +35.0 v power dissipation 2 pd 1.2 w operating temperature range topr -40 +105 storage temperature range tstg -55 +150 maximum junction temperature tjmax 150 1 not to exceed pd. 2 reduced by 9.6mw / c over ta = 25c, when mounted on glass epoxy board: 70mm70mm 1.6mm. operating conditions ta=25 parameter symbol min. max. unit supply voltage vcc 10.0 25.0 output current io 0 1.0 a note : this product is not designed for protection against radioactive rays.
2/4 rev. a electrical characteristics unless otherwise specified, ta=25 , vcc=14v, io=0ma parameter symbol limit unit conditions min. typ. max. bias current ib 0.6 1.0 ma output voltage vo 8.91 9.00 9.09 v io=500ma dropout voltage vd 0.3 0.5 v vcc=vo 0.95, io=500ma ripple rejection r.r. 40 50 db f=120hz,ein 1 =1vrms, io=100ma line regulation reg.i 20 60 mv vcc=10 25v load regulation reg.l vo 0.010 vo 0.015 v io=5ma 1a temperature coefficient of output voltage tcvo.1 +0.04 / io=5ma,tj=-40 -20 tcvo.2 0.005 / io=5ma,tj=-20 +105 1 ein : input voltage ripple physical dimensions, marking to252s-3 unit : mm lot.no. marking ?
3/4 rev. a block diagram pin number , pin name pin number pin name function 1 vcc power supply pin 2 n.c. n.c. pin 3 vo output pin fin gnd gnd operation notes 1. absolute maximum ratings use of the ic in excess of absolute maximu m ratings (such as the input voltage or operating temperature range) may result in da mage to the ic. assumptions should not be made regarding the state of the ic (e.g., short mode or open mode) when such damage is suffered. if operational values are expected to exceed t he maximum ratings for the device, consider adding protective circ uitry (such as fus es) to eliminate the risk of damaging the ic. 2. electrical characteristics described in these specifications may vary, depending on temperature, supply voltage, external ci rcuits and other conditions. therefore, be sure to check all rele vant factors, including tr ansient characteristics. 3.gnd potential the potential of the gnd pin must be the minimum potential in the system in all operating conditions. ensure that no pins are a t a voltage below the gnd at any time, regardle ss of transient characteristics. 4.ground wiring pattern when using both small-signal and large-current gnd traces, the two ground traces should be routed separately but connected to a single ground potential within the application in order to avoid variati ons in the small-signal ground caused by large currents. also ensure that the gnd traces of external components do not c ause variations on gnd voltage. the power supply and ground lines must be as short an d thick as possible to reduce line impedance. 5.inter-pin shorts and mounting errors use caution when orienting and positioning the ic for mounting on printed circuit boards. improper mounting may result in damag e to the ic. shorts between output pins or between output pins and the power supply or gnd pins (caused by poor soldering or foreign objects) may result in damage to the ic. 6.operation in strong electromagnetic fields using this product in strong elec tromagnetic fields may caus e ic malfunction. caution should be exercised in applications where strong electromagnetic fields may be present. 7.testing on application boards when testing the ic on an application board, connecting a capacitor di rectly to a low-impedance pin may subject the ic to stres s. always discharge capacitors completely af ter each process or step. the ic?s power supply should always be turned off completely before connecting or removing it from a jig or fixture during th e evaluation process. to prevent damage from static discharge, ground the ic during assembly and use similar pr ecautions during transport and storage. 8.thermal consideration use a thermal design that allows for a sufficient margin in light of the pd in actual operating conditions. consider pc that does not exceed pd in actual operating conditions. pd Rpc tjmax : maximum junction temperature=150 , ta : peripheral temperature[ ] , ja : thermal resistance of package-ambience[ /w], pd : package power dissipation [w], pc : power dissipation [w], vcc : input voltage, vo : output voltage, io : load, ib : bias current package power dissipation : pd (w) (tjmax ta ) ja power dissipation : pc (w) (vcc vo) io vcc ib 9.vcc pin insert a capacitor capacitor R1f between the vcc and gnd pins. the appropriate ca pacitance value varies by application. be sure to allow a sufficient margin for input voltage levels. gnd n.c. 3 2 1 vcc vo fin driver ocp tsd vref vref ocp tsd driver bandgap reference over current protection circuit thermal shut down circuit power transistor driver
4/4 rev. a 10.output pins it is necessary to place capacitors between each output pin and g nd to prevent oscillation on the output. usable capacitance v alues range from 1 f to 1000 f. ceramic capacitors can be used as long as thei r esr value is low enough to prevent oscillation (0.001 to 20 ). abrupt fluctuations in input voltage and load conditions ma y affect the output voltage. output capacitance values should be determined only through sufficient testing of the actual application. 11.over current protection circuit (ocp) the ic incorporates an integrated over-current protection circ uit that operates in accordance with the rated output capacity. this circuit serves to protect the ic from damage when the load becomes short ed. it is also designed to limit output current (without latchi ng) in the event of a large and instantaneous current flow from a large ca pacitor or other component. these protection circuits are effect ive in preventing damage due to sudden and unexpected accidents. however, the ic should not be used in applications characterized by t he continuous or transitive operation of the protection circuits. 12.thermal shutdown circuit (tsd) the ic incorporates a built-in thermal shut down circuit, which is designed to turn the ic off completely in the event of therma l overload. it is not designed to protect the ic from damage or guarantee its operation. ics should not be used after this function has act ivated, or in applications where the operatio n of this circuit is assumed. 13.applications or inspection processes where the potential of t he vcc pin or other pins may be reversed from their normal stat e may cause damage to the ic's internal circuitry or elements. use an output pin capacitance of 1000 f or lower in case vcc is shorted with the gnd pin while the external capacitor is charged. insert a dio de in series with vcc to prevent reverse current flow, or inse rt bypass diodes between vcc and each pin. 14.positive voltage surges on vcc pin a power zener diode should be inserted between vcc and gnd for prot ection against voltage surges of more than 35v on the vcc pin. 15.negative voltage surges on vcc pin a schottky barrier diode should be inserted between vcc and gnd fo r protection against voltages lower than gnd on the vcc pin. 16. output protection diode loads with large inductance components may cause reverse current flow during startup or shutdown. in such cases, a protection diode should be inserted on the output to protect the ic. 17.regarding input pins of the ic this monolithic ic contains p+ isolation and p substrate layers between adjacent elements in order to keep them isolated. pn junctions are formed at the intersection of these p layers with the n layers of other elements, creating parasitic diodes and/o r transistors. for example (refer to the figure below): when gnd > pin a and gnd > pin b, the pn junction operates as a parasitic diode when gnd > pin b, the pn junction operates as a parasitic transistor parasitic diodes occur inevitably in the structure of the ic, a nd the operation of these parasitic diodes can result in mutual interference among circuits, operational faults, or physical damage. accordingly, conditions that cause these diodes to operate, such as app lying a voltage lower than the gnd voltage to an input pin (and thus to the p substrate) should be avoided. example of simple monolithic ic architecture parasitic elements (pin a) parasitic elements or transistors (pin b) c b e n p n n p+ p+ parasitic elements or transistors p substrate (pin b) c b e transistor (npn) (pin a) n p n n p+ p+ resistor parasitic elements p gnd gnd gnd n
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